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Senior ASIC Design Engineer

Recogni

San Francisco, CARemote OKFull-time$180k – $280k / year

About this role

Job Application for Senior ASIC Design Engineer at ​Recogni Apply Now(app) Senior ASIC Design Engineer at ​Recogni(View all jobs)(https://boards.greenhouse.io/recogni) San Jose, CA About Recogni: Artificial intelligence (AI) is transforming our world. It can perform cognitive functions that previously only humans could do, such as perceiving interactions across different environments with the ability to quickly learn and then solve complex problems. Recogni is a system solution company that specializes in the design of industry-leading high-performance, low-power AI inferencing. Our mission is to enable multimodal Generative AI inference acceleration at scale by providing safe, sustainable, high-performance AI-driven solutions for many markets. We are at the leading edge of advancing the latest research and product improvements for Al inference solutions that will make Al even more advantageous for compelling new applications. Recogni is a well funded, fast-paced startup company with headquarters in both San Jose, CA, and Munich, Germany. We also have many talented team members working remotely. We prioritize our employees' well-being and their families, aiming for a healthier, happier life inside and outside work. We value their contributions and offer tailored benefits for health and financial security, catering to different life stages. Our comprehensive benefits and competitive compensation, including flexible spending and Bonusly awards, reflect our commitment to a supportive and inspiring work environment. About the role: As a senior member of Recogni’s ASIC team, you will be responsible for the microarchitecture and design implementation of a high-performance and low-power convolutional neural network accelerator ASIC that forms the core of the company’s flagship perception module product for autonomous driving applications.This ASIC’s design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to form an end-to-en

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