Physical Design Engineer

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. About The Role Join our close-knit physical design team where you'll excel in synthesizing, placing, and routing high speed designs. Experience the full spectrum of physical design and implementation, collaborating closely with the RTL team and integrating these blocks seamlessly into the full-chip architecture. Skills and Qualifications Required: 10+ years of physical design/verification experience. Strong knowledge of block level and full-chip physical verification methodology. Strong background in block physical design, Synthesis, PDV and IR. Expert at optimizing for the best power/performance and area. Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus. Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues. Expert with IR/EM analysis and resolution. Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements. Demonstrated ability to work with RTL teams to optimize for physical design. Should demonstrate ownership, deep dive and should demonstrate strong fundamental understanding of PD concepts. Preferred: Experience doing full chip floor planning and integration. Knowledge of clock distribution. Knowledge of cooling analysis. STA would be good to have. Knowledge of 2.5D or 3